Changeset 1bc7201 in git for Singular/links/ssiLink.cc
- Timestamp:
- Oct 19, 2012, 6:38:35 PM (12 years ago)
- Branches:
- (u'spielwiese', 'fe61d9c35bf7c61f2b6cbf1b56e25e2f08d536cc')
- Children:
- c879eea1669e963fb4c7287a3963abb287d00a49
- Parents:
- b37b3984a12e1552c7bafc9fd5a7849240ea79806bbe944402dfca102dcc3e036c4f2f119be41e44
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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Singular/links/ssiLink.cc
r6bbe94 r1bc7201 243 243 } 244 244 245 void ssiWritePoly(ssiInfo *d, int typ,poly p)245 void ssiWritePoly(ssiInfo *d, poly p) 246 246 { 247 247 SSI_BLOCK_CHLD; … … 267 267 void ssiWriteIdeal(ssiInfo *d, int typ,ideal I) 268 268 { 269 // syntax : 7 # of elements <poly 1> <poly2>.....270 // syntax : 8 <rows> <cols> <poly 1> <poly2>.....269 // syntax ideal/module: 7 # of elements <poly 1> <poly2>..... 270 // syntax matrix: 8 <rows> <cols> <poly 1> <poly2>..... 271 271 matrix M=(matrix)I; 272 272 SSI_BLOCK_CHLD; … … 278 278 279 279 int i; 280 int tt;281 if (typ==MODUL_CMD) tt=VECTOR_CMD;282 else tt=POLY_CMD;283 280 284 281 for(i=0;i<IDELEMS(I);i++) 285 282 { 286 ssiWritePoly(d, tt,I->m[i]);283 ssiWritePoly(d,I->m[i]); 287 284 } 288 285 } … … 516 513 //Print("poly: terms:%d\n",n); 517 514 poly p; 518 int j;519 j=0;520 515 poly ret=NULL; 521 516 poly prev=NULL; … … 944 939 SI_LINK_SET_RW_OPEN_P(l); 945 940 d->send_quit_at_exit=1; 946 fprintf(d->f_write,"98 %d %d %u %u\n",SSI_VERSION,MAX_TOK, test,verbose);941 fprintf(d->f_write,"98 %d %d %u %u\n",SSI_VERSION,MAX_TOK,si_opt_1,si_opt_2); 947 942 } 948 943 // ---------------------------------------------------------------------- … … 1021 1016 { 1022 1017 d->f_write = outfile; 1023 fprintf(d->f_write,"98 %d %d %u %u\n",SSI_VERSION,MAX_TOK, test,verbose);1018 fprintf(d->f_write,"98 %d %d %u %u\n",SSI_VERSION,MAX_TOK,si_opt_1,si_opt_2); 1024 1019 } 1025 1020 } … … 1210 1205 Print("// opening ssi-%d, MAX_TOK=%d\n",n98_v,n98_m); 1211 1206 #endif 1212 test=n98_o1;1213 verbose=n98_o2;1207 si_opt_1=n98_o1; 1208 si_opt_2=n98_o2; 1214 1209 return ssiRead1(l); 1215 1210 } … … 1280 1275 if(tt==POLY_CMD) fputs("6 ",d->f_write); 1281 1276 else fputs("9 ",d->f_write); 1282 ssiWritePoly(d, tt,(poly)dd);1277 ssiWritePoly(d,(poly)dd); 1283 1278 break; 1284 1279 case IDEAL_CMD: … … 1796 1791 **/ 1797 1792 /*---------------------------------------------------------------------*/ 1798 void sig_chld_hdl(int sig)1793 void sig_chld_hdl(int) 1799 1794 { 1800 1795 pid_t kidpid;
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